The present invention relates to plastic package semiconductor devices and methods of making the devices, and more particularly to a ball grid array (BGA) package semiconductor device, a method of fixing and supporting the components of the device and a method of making the device.
Semiconductor package structures have advanced toward miniaturization and thinning to increase the density of components packaged therein. The quantity of information to be processed by one chip tends to increase. The number of input/output pins per package tends to increase. Since the size of the package cannot increase as much as one desires, however, the spacing between any adjacent lead pins tends to decrease greatly as the number of lead pins increases. Thus, the current situation is that a high technique is required for mounting devices on a circuit board or substrate. In order to facilitate the mounting of devices, packages have appeared having an external connection structure such as a pin grid array (PGA) and a BGA which are different in external connection form from the conventional ones. A face up type BGA package is disclosed in U.S. Pat. No. 5,216,278. A face down type is disclosed in U.S. Pat. No. 5,148,265.
The BGA structure similar to one disclosed in U.S. Pat. No. 5,216,278, for example, will next be outlined as an example of the face up type with reference to FIGS. 38-40.
FIG. 38 is a cross-sectional view of a BGA package. An IC chip 1 is bonded to a circuit board 2 by means of an adhesive or the like. The board 2 is made of an organic material such as a BT resin. The IC chip 1 is connected electrically by bonding wires 13 to pads 12 on the board 2.
FIG. 39 is a top plan view of the BGA package of FIG. 38. Wiring patterns each extending from a pad 12 on the board 2 are disposed on the board 2 to communicate with a terminal 3 on the back of the board 2.
FIG. 40 is a bottom view of the package of FIG. 38. The terminals 3 are disposed at crossing points of a grid and electrical wiring is completed by joining metal bumps 4 to the corresponding terminals 3. A protective package is finished by covering with resin 14 that surface of the board on which the IC chip 1 which is a constituent component is provided.
A plurality of cavities each for a BGA package are usually disposed within a mold and filled with resin in the molding process in view of productivity. Therefore, the BGA packages are difficult to position within the mold in such arrangement and a molded product removal process is very complicated. This increases the manufacturing cost.
A face down type BGA package structure similar to one disposed in U.S. Pat. No. 5,148,265, for example, will be described, with respect to FIGS. 41 and 42. FIG. 41 is a perspective view of a BGA package composed of inserts 32 of silicon rubber or the like placed on a circuit side surface of an IC chip 1 and a circuit film 31 having a circuit pattern placed on the inserts 32. The IC chip 1 and the circuit film 31 are connected by bonding wires 13.
FIG. 42 is an enlarged cross-sectional view of connections of FIG. 41. The protective package is completed by covering, with an elastic resin 14, the IC chip 1 and the package excluding the areas of the terminals 33 to complete a package. In this case, there are problems similar to those with the face up type package. Since, usually, a plurality of BGA packages is disposed within a mold and filled with resin in the molding process in view of productivity, the packages are difficult to position within the mold in such arrangement and a molded product removal process is very complicated. This would increase the manufacturing cost.
In the process of molding packages each including a circuit board, the circuit board is usually placed between an upper mold half and a lower mold half and resin is filled into cavities provided over the circuit board. Therefore, a runner and a gate which compose a flow path through which resin is fed over the board are required to be provided, which is a restriction to the design of an electric circuit. In addition, this might reduce the reliability of the package because there is a possibility of the circuit board being damaged in the process of removal of the runner and gate which become unnecessary after molding.
There are many known prior art molding methods which uses no runner and gate disposed on the circuit board which compose a flow path through which resin is filled onto the circuit board; for example, JP-B-61-46049 and JP-A-4-184944. JP-B-61-46049 discloses a molding process performed in an arrangement where a mold has a runner and a gate which compose a part of a flow path through which resin is fed into a cavity composed of plates (so-called "cavity plates") with the cavity and the circuit board being placed within the mold. In this process, there are no restrictions to the design of an electric circuit on the circuit board, but there is a possibility that when a thin package is to be produced, other problems will occur such as deformation of the cavity plates themselves or removal of resin burrs produced on the circuit board because the cavity plates are thin. In addition, each time molding is performed, the cavity plates are required to be replaced with new ones and hence automation of the molding process is difficult.
JP-A-4-184944 discloses a mold structure where a runner and a gate are incorporated in a mold to compose a flow path through which resin is fed into the mold. The engaged portions at the runner and gate are arranged to slide each other when the mold is opened. In this case, resin flows over the sliding parts, so that resin is likely to enter into a possible spacing between the sliding parts. Thus, resin burrs are likely to be produced to act as sliding resistance to the sliding element to thereby cause malfunction of same, undesirably. This malfunction can be a serious problem in the production of those packages.